A 4320MIPS four-processor core SMP/AMP with individually managed clock frequency for low power consumption
クロック周波数を個別に管理して低消費電力化した4320MIPS 4プロセッサコアSMP/AMP
Yutaka Yoshida, Tatsuya Kamei, Kiyoshi Hayase, Shinichi Shibahara, Osamu Nishii, Toshihiro Hattori, Atsushi Hasegawa, Masashi Takada, Naohiko Irie, Kunio Uchiyama, Toshihiko Odaka, Kiwamu Takada, Keiji Kimura, Hironori Kasahara
Digest of Technical Papers - IEEE International Solid-State Circuits Conference